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| SSM60T03GH,J N-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS R DS(ON) ID DESCRIPTION The SSM60T03 acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM60T03GH is in a TO-252 package, which is widely used for commercial and industrial surface-mount applications. The through-hole version, the SSM60T03GJ in TO-251, is available for vertical mounting, where a small footprint is required on the board, and/or an external heatsink is to be attached. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. The devices have a maximum junction temperature rating of 175C for improved thermal margin and reliability. 30V 12m 45A Pb-free; RoHS-compliant TO-251 (IPAK) and TO-252 (DPAK) G GD S D S TO-251 (suffix J) TO-252 (suffix H) ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID IDM PD EAS TSTG TJ Parameter Drain-source voltage Gate-source voltage Continuous drain current, TC = 25C TC = 100C Pulsed drain current 1 Value 30 20 45 32 120 44 0.352 3 Units V V A A A W W/C mJ C C Total power dissipation, TC = 25C Linear derating factor Single pulse avalanche energy Storage temperature range Operating junction temperature range 29 -55 to 175 -55 to 175 THERMAL CHARACTERISTICS Symbol RJC RJA Parameter Maximum thermal resistance, junction-case Maximum thermal resistance, junction-ambient Value 3.4 110 Units C/W C/W Notes: 1.Pulse width must be limited to avoid exceeding the safe operating area. 2.Pulse width <300us, duty cycle <2%. 3.VDD=25V , L=100uH , RG=25 , IAS=24A. 10/16/2005 Rev.3.1 www.SiliconStandard.com 1 of 5 SSM60T03GH,J ELECTRICAL CHARACTERISTICS Symbol BVDSS Parameter Drain-source breakdown voltage Breakdown voltage temperature coefficient (at Tj = 25C, unless otherwise specified) Test Conditions VGS=0V, ID=250uA Reference to 25C, ID=1mA VGS=10V, ID=20A VGS=4.5V, ID=15A Min. 30 1 Typ. Max. Units 0.026 25 11.6 3.9 7 8.8 57.5 18.5 6.4 1135 200 135 12 25 3 1 250 100 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF BV DSS/ T j RDS(ON) Static drain-source on-resistance VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate threshold voltage Forward transconductance Drain-source leakage current VDS=VGS, ID=250uA VDS=10V, ID=10A VDS=30V, VGS=0V VDS=24V ,VGS=0V, Tj=175C VGS= 20V ID=20A VDS=20V VGS=4.5V VDS=15V ID=20A RG=3.3 , VGS=10V RD=0.75 VGS=0V VDS=25V f=1.0MHz Gate-source leakage current Total gate charge 2 Gate-source charge Gate-drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Input capacitance Output capacitance Reverse transfer capacitance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward voltage 2 2 Test Conditions IS=45A, VGS=0V IS=20A, VGS=0V, dI/dt=100A/s Min. - Typ. Max. Units 23.3 16 1.3 V ns nC Reverse-recovery time Reverse-recovery charge Notes: 1.Pulse width must be limited to avoid exceeding the safe operating area. 2.Pulse width <300us, duty cycle <2%. 3.VDD=25V , L=100uH , RG=25 , IAS=24A. 10/16/2005 Rev.3.1 www.SiliconStandard.com 2 of 5 SSM60T03GH,J 125 90 T C =25 C 100 o T C =175 C 10V 8.0V ID , Drain Current (A) 60 o 10V 8.0V ID , Drain Current (A) 75 6.0V 6.0V 5.0V 50 5.0V 30 V G =4.0V 25 V G =4.0V 0 0 1 2 3 4 0 0 1 2 3 4 5 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 80 2 I D =20A T C =25 C 60 1.6 I D =20A V G =10V Normalized RDS(ON) RDS(ON) (m ) 40 1.2 20 0.8 0 3 5 7 9 11 0.4 -50 25 100 175 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance vs. Gate Voltage 100 2.8 Fig 4. Normalized On-Resistance vs. Junction Temperature 2.3 10 1.8 IS(A) T j =175 o C T j =25 o C VGS(th) (V) 1.3 1 0.8 0.1 0 0.5 1 1.5 0.3 -50 25 100 175 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C ) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage vs. Junction Temperature 10/16/2005 Rev.3.1 www.SiliconStandard.com 3 of 5 SSM60T03GH,J 12 10000 f=1.0MHz I D =20A VGS , Gate to Source Voltage (V) 9 V DS =10V V DS =15V V DS =20V C (pF) 1000 6 C iss 3 C oss C rss 0 100 0 6 12 18 24 1 8 15 22 29 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1000 1 Normalized Thermal Response (Rthjc) Duty factor = 0.5 100 0.2 ID (A) 100us 0.1 0.1 0.05 PDM 0.02 0.01 10 1ms T C =25 o C Single Pulse 10ms 100ms DC 1 10 100 t T Single Pulse Duty Factor = t/T Peak Tj = PDM x Rthjc + T C 1 0.01 0.1 0.00001 0.0001 0.001 0.01 0.1 1 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig10. Effective Transient Thermal Impedanc VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform 10/16/2005 Rev.3.1 www.SiliconStandard.com 4 of 5 SSM60T03GH,J PHYSICAL DIMENSIONS E b3 L3 A c2 S Y M B O L TO-252-3L MILLIMETERS MIN. 1.80 0.00 0.40 4.80 0.35 0.40 5.10 6.00 2.30 BSC 7.80 1.00 2.20 0.35 0.50 0.50 0 11.05 2.55 3.05 0.65 2.03 1.20 8 MAX. 2.80 0.13 1.00 5.90 0.65 0.89 6.30 7.00 A A1 D b b3 H L4 c c2 A A SEE VIEW B D E e H e b WITH PLATING c L L1 BASE METAL SECTION A-A L2 L3 L4 GAUGE PLANE SEATING PLANE L VIEW B A1 L2 L1 *Dimensions do not include mold protrusions. PART MARKING PART NUMBER: 60T03GH or 60T03GJ XXXXXX YWWSSS DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence PACKING: Moisture sensitivity level MSL3 TO-252: 3000 pcs in antistatic tape on a reel packed inside a moisture barrier bag (MBB). TO-251: 1000pcs in an antistatic bag packed inside a moisture barrier bag (MBB). Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 10/16/2005 Rev.3.1 www.SiliconStandard.com 5 of 5 |
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